ia64_srlz_i();
}
-void
-vmx_load_rr7_and_pta(VCPU *vcpu)
-{
- unsigned long psr;
-
- local_irq_save(psr);
-
- vmx_switch_rr7(vrrtomrr(vcpu,VMX(vcpu, vrr[VRN7])),
- (void *)vcpu->domain->shared_info,
- (void *)vcpu->arch.privregs,
- (void *)vcpu->arch.vhpt.hash, pal_vaddr );
- ia64_set_pta(vcpu->arch.arch_vmx.mpta);
- ia64_srlz_d();
- local_irq_restore(psr);
- ia64_srlz_i();
-}
void
switch_to_physical_rid(VCPU *vcpu)
panic_domain(0,"load_region_regs: can't set! bad=%lx\n",bad);
}
}
-
-void load_region_reg7_and_pta(struct vcpu *v)
-{
- unsigned long rr7, pta;
-
- if (!is_idle_domain(v->domain)) {
- ia64_set_pta(VHPT_ADDR | (1 << 8) | (VHPT_SIZE_LOG2 << 2) |
- VHPT_ENABLED);
-
- // TODO: These probably should be validated
- rr7 = VCPU(v,rrs[7]);
- if (!set_one_rr(0xe000000000000000L, rr7))
- panic_domain(0, "%s: can't set!\n", __func__);
- }
- else {
- pta = ia64_get_pta();
- ia64_set_pta(pta & ~VHPT_ENABLED);
- }
-}
extern int set_metaphysical_rr0(void);
extern void load_region_regs(struct vcpu *v);
-extern void load_region_reg7_and_pta(struct vcpu *v);
#endif /* !_REGIONREG_H_ */
extern void recover_if_physical_mode(VCPU *vcpu);
extern void vmx_init_all_rr(VCPU *vcpu);
extern void vmx_load_all_rr(VCPU *vcpu);
-extern void vmx_load_rr7_and_pta(VCPU *vcpu);
extern void physical_tlb_miss(VCPU *vcpu, u64 vadr);
/*
* No sanity check here, since all psr changes have been